Add CY8CEVAL-062S2 support and bring the PSoC 6 port to parity

Author: aidangarske

.github/workflows/test-build-psoc6.yml

@@ -1,4 +1,4 @@
-name: Wolfboot Reusable Build Workflow for Cypress PSoC6
+name: Wolfboot Reusable Build Workflow for Infineon PSoC 6
 
 on:
 
@@ -13,6 +13,10 @@ on:
       make-args:
         required: false
         type: string
+      ramcode-check:
+        required: false
+        type: boolean
+        default: false
 
 jobs:
 
@@ -27,31 +31,12 @@ jobs:
         with:
           submodules: true
 
-      - uses: actions/checkout@v4
-        with:
-          repository: Infineon/psoc6pdl
-          path: lib/psoc6pdl
-
-      - uses: actions/checkout@v4
-        with:
-          repository: Infineon/TARGET_CY8CKIT-062S2-43012
-          path: lib/TARGET_CY8CKIT-062S2-43012
-
-      - uses: actions/checkout@v4
-        with:
-          repository: Infineon/core-lib
-          path: lib/core-lib
-
       - name: Trust workspace
         run: git config --global --add safe.directory "$GITHUB_WORKSPACE"
 
-      - name: Patch cy_syslib.c to declare cy_delay32kMs
+      - name: Fetch Infineon PSoC 6 libraries
         run: |
-          # Add extern declaration for cy_delay32kMs directly in cy_syslib.c
-          # Find the line with the include and add the extern declaration after it
-          awk '/#include "cy_syslib.h"/ {print; print ""; print "/* Extern declaration for delay variable */"; print "extern uint32_t cy_delay32kMs;"; next} 1' \
-            lib/psoc6pdl/drivers/source/cy_syslib.c > /tmp/cy_syslib_patched.c
-          mv /tmp/cy_syslib_patched.c lib/psoc6pdl/drivers/source/cy_syslib.c
+          tools/ci/fetch-psoc6-pdl.sh lib
 
       - name: make distclean
         run: |
@@ -68,3 +53,9 @@ jobs:
       - name: Build wolfboot
         run: |
           make ${{inputs.make-args}} V=1
+
+      - name: Check the self-update code is all in RAM
+        if: ${{ inputs.ramcode-check }}
+        run: |
+          python3 tools/scripts/check-ramcode.py --selftest
+          python3 tools/scripts/check-ramcode.py wolfboot.elf wolfBoot_self_update 0x08000000 0x08060000

.github/workflows/test-configs.yml

@@ -20,6 +20,71 @@ jobs:
       arch: arm
       config-file: ./config/examples/cypsoc6.config
 
+  cypsoc6_eval_test:
+    uses: ./.github/workflows/test-build-psoc6.yml
+    with:
+      arch: arm
+      config-file: ./config/examples/cypsoc6.config
+      make-args: PSOC6_BOARD=CY8CEVAL_062S2
+
+  cypsoc6_nouart_test:
+    uses: ./.github/workflows/test-build-psoc6.yml
+    with:
+      arch: arm
+      config-file: ./config/examples/cypsoc6.config
+      make-args: DEBUG_UART=0
+
+  cypsoc6_crypto_test:
+    uses: ./.github/workflows/test-build-psoc6.yml
+    with:
+      arch: arm
+      config-file: ./config/examples/cypsoc6.config
+      make-args: PSOC6_CRYPTO=1
+
+  cypsoc6_cm4_test:
+    uses: ./.github/workflows/test-build-psoc6.yml
+    with:
+      arch: arm
+      config-file: ./config/examples/cypsoc6.config
+      make-args: PSOC6_CM4_APP=1 IMAGE_HEADER_SIZE=1024
+
+  cypsoc6_ramcode_test:
+    uses: ./.github/workflows/test-build-psoc6.yml
+    with:
+      arch: arm
+      config-file: ./config/examples/cypsoc6.config
+      make-args: RAM_CODE=1
+      ramcode-check: true
+
+  cypsoc6_dualbank_test:
+    uses: ./.github/workflows/test-build-psoc6.yml
+    with:
+      arch: arm
+      config-file: ./config/examples/cypsoc6.config
+      make-args: DUALBANK_SWAP=1 WOLFBOOT_PARTITION_UPDATE_ADDRESS=0x12020000 WOLFBOOT_PARTITION_SWAP_ADDRESS=0xFFFFFFFF
+
+  cypsoc6_qspi_test:
+    uses: ./.github/workflows/test-build-psoc6.yml
+    with:
+      arch: arm
+      config-file: ./config/examples/cypsoc6-qspi.config
+      make-args: PSOC6_BOARD=CY8CEVAL_062S2
+
+  cypsoc6_qspi_ramcode_test:
+    uses: ./.github/workflows/test-build-psoc6.yml
+    with:
+      arch: arm
+      config-file: ./config/examples/cypsoc6-qspi.config
+      make-args: PSOC6_BOARD=CY8CEVAL_062S2 RAM_CODE=1
+      ramcode-check: true
+
+  cypsoc6_qspi_cm4_test:
+    uses: ./.github/workflows/test-build-psoc6.yml
+    with:
+      arch: arm
+      config-file: ./config/examples/cypsoc6-qspi.config
+      make-args: PSOC6_BOARD=CY8CEVAL_062S2 PSOC6_CM4_APP=1 IMAGE_HEADER_SIZE=1024
+
   hifive1_test:
     uses: ./.github/workflows/test-build-riscv.yml
     with:

.github/workflows/test-units.yml

@@ -29,10 +29,16 @@ jobs:
         run: |
           tools/ci/fetch-mcuxsdk-headers.sh "$GITHUB_WORKSPACE/mcuxsdk"
 
+      - name: Fetch Infineon PSoC 6 PDL headers
+        run: |
+          tools/ci/fetch-psoc6-pdl.sh "$GITHUB_WORKSPACE/psoc6libs"
+
       - name: Build unit tests
         run: |
-          make -C tools/unit-tests MCUXSDK="$GITHUB_WORKSPACE/mcuxsdk"
+          make -C tools/unit-tests MCUXSDK="$GITHUB_WORKSPACE/mcuxsdk" \
+            PSOC6_LIBS="$GITHUB_WORKSPACE/psoc6libs"
 
       - name: Run unit tests
         run: |
-          make -C tools/unit-tests run MCUXSDK="$GITHUB_WORKSPACE/mcuxsdk"
+          make -C tools/unit-tests run MCUXSDK="$GITHUB_WORKSPACE/mcuxsdk" \
+            PSOC6_LIBS="$GITHUB_WORKSPACE/psoc6libs"

.gitignore

@@ -146,6 +146,9 @@ tools/unit-tests/unit-delta
 tools/unit-tests/unit-psoc-c3-divider
 tools/unit-tests/unit-psoc-e8-tz
 tools/unit-tests/unit-psoc-e8-flash
+tools/unit-tests/unit-psoc6-flash
+tools/unit-tests/unit-psoc6-qspi
+tools/unit-tests/unit-psoc6-boot
 tools/unit-tests/unit-disk
 tools/unit-tests/unit-fs-probe
 tools/unit-tests/unit-fat32
@@ -431,6 +434,12 @@ lib/r_config
 lib/r_flash_rx
 lib/r_tsip_rx
 
+# Infineon PSoC 6 libraries
+lib/mtb-pdl-cat1
+lib/mtb-template-cat1
+lib/cmsis
+lib/core-lib
+
 Debug/
 Release/
 language.settings.xml

arch.mk

@@ -2458,25 +2458,59 @@ endif
 
 ifeq ($(TARGET),psoc6)
     CORTEX_M0=1
-    OBJS+=\
+    PSOC6_BOARD?=CY8CKIT_062S2_43012
+    # The boot ROM's flash NMI handler reprograms the CM0+ MPU for itself and
+    # cannot run under wolfBoot's map, which marks the ROM execute-never.
+    ifneq ($(NO_MPU),1)
+        $(error TARGET=psoc6 requires NO_MPU=1)
+    endif
+    # Main and work flash erase to 0x00
+    ifneq ($(FLAGS_INVERT),1)
+        $(error TARGET=psoc6 requires FLAGS_INVERT=1)
+    endif
+    # Rewriting a programmed row erases it first, so trailer updates need the
+    # two-sector trailer to survive a power cut
+    ifneq ($(NVM_FLASH_WRITEONCE),1)
+        $(error TARGET=psoc6 requires NVM_FLASH_WRITEONCE=1)
+    endif
+    CYPRESS_PDL_DEV:=$(CYPRESS_PDL)/devices/COMPONENT_CAT1A
+    CYPRESS_PDL_TEMPLATE:=$(CYPRESS_TEMPLATE_LIB)/files/templates/cat1a/COMPONENT_MTB
+    PSOC6_PDL_OBJS:=\
         $(CYPRESS_PDL)/drivers/source/cy_flash.o \
         $(CYPRESS_PDL)/drivers/source/cy_ipc_pipe.o \
         $(CYPRESS_PDL)/drivers/source/cy_ipc_sema.o \
         $(CYPRESS_PDL)/drivers/source/cy_ipc_drv.o \
-        $(CYPRESS_PDL)/drivers/source/cy_device.o \
         $(CYPRESS_PDL)/drivers/source/cy_sysclk.o \
         $(CYPRESS_PDL)/drivers/source/cy_sysint.o \
         $(CYPRESS_PDL)/drivers/source/cy_syslib.o \
-        $(CYPRESS_PDL)/drivers/source/cy_ble_clk.o \
-        $(CYPRESS_PDL)/drivers/source/cy_wdt.o \
-        $(CYPRESS_PDL)/drivers/source/TOOLCHAIN_GCC_ARM/cy_syslib_gcc.o \
-        $(CYPRESS_PDL)/devices/templates/COMPONENT_MTB/COMPONENT_CM0P/system_psoc6_cm0plus.o
+        $(CYPRESS_PDL)/drivers/source/cy_gpio.o \
+        $(CYPRESS_PDL)/drivers/source/TOOLCHAIN_GCC_ARM/cy_syslib_ext.o \
+        $(CYPRESS_PDL_DEV)/source/cy_device.o
+    OBJS+=$(PSOC6_PDL_OBJS) \
+        $(CYPRESS_PDL_TEMPLATE)/COMPONENT_CM0P/system_psoc6_cm0plus.o
+    PSOC6_UART_OBJS:=\
+        $(CYPRESS_PDL)/drivers/source/cy_scb_common.o \
+        $(CYPRESS_PDL)/drivers/source/cy_scb_uart.o
+    PSOC6_SMIF_OBJS:=\
+        $(CYPRESS_PDL)/drivers/source/cy_smif.o \
+        $(CYPRESS_PDL)/drivers/source/cy_smif_memslot.o \
+        $(CYPRESS_PDL)/drivers/source/cy_smif_sfdp.o
+    ifeq ($(DEBUG_UART),1)
+        OBJS+=$(PSOC6_UART_OBJS)
+    endif
+    ifeq ($(BOOT_BENCHMARK),1)
+        OBJS+=$(CYPRESS_PDL)/drivers/source/cy_tcpwm_counter.o
+    endif
+    ifeq ($(EXT_FLASH),1)
+        OBJS+=$(PSOC6_SMIF_OBJS)
+    endif
     PSOC6_CRYPTO_OBJS=\
         $(WOLFBOOT_LIB_WOLFSSL)/wolfcrypt/src/port/cypress/psoc6_crypto.o \
         $(CYPRESS_PDL)/drivers/source/cy_crypto_core_vu.o \
         $(CYPRESS_PDL)/drivers/source/cy_crypto_core_ecc_domain_params.o \
         $(CYPRESS_PDL)/drivers/source/cy_crypto_core_ecc_nist_p.o \
         $(CYPRESS_PDL)/drivers/source/cy_crypto_core_ecc_ecdsa.o \
+        $(CYPRESS_PDL)/drivers/source/cy_crypto_core_ecc_key_gen.o \
         $(CYPRESS_PDL)/drivers/source/cy_crypto_core_sha_v2.o \
         $(CYPRESS_PDL)/drivers/source/cy_crypto_core_sha_v1.o \
         $(CYPRESS_PDL)/drivers/source/cy_crypto_core_mem_v2.o \
@@ -2486,15 +2520,20 @@ ifeq ($(TARGET),psoc6)
         $(CYPRESS_PDL)/drivers/source/cy_crypto.o
 
     CFLAGS+=\
-        -I$(CYPRESS_PDL)/devices/include \
         -I$(CYPRESS_PDL)/drivers/include \
-        -I$(CYPRESS_PDL)/cmsis/include \
-        -I$(CYPRESS_TARGET_LIB) \
+        -I$(CYPRESS_PDL_DEV)/include \
+        -I$(CYPRESS_PDL_DEV)/include/ip \
+        -I$(CYPRESS_PDL_TEMPLATE) \
+        -I$(CYPRESS_CMSIS)/Core/Include \
         -I$(CYPRESS_CORE_LIB)/include \
-        -I$(CYPRESS_PDL)/devices/include/ip \
-        -I$(CYPRESS_PDL)/devices/templates/COMPONENT_MTB \
-        -DCY8C624ABZI_D44
+        -DCY8C624ABZI_S2D44 \
+        -DPSOC6_BOARD_$(PSOC6_BOARD)
     ARCH_FLASH_OFFSET=0x10000000
+    # Copies then program whole erased rows instead of rewriting half rows
+    CFLAGS+=-DFLASHBUFFER_SIZE=512
+    ifeq ($(PSOC6_CM4_APP),1)
+        CFLAGS+=-DPSOC6_CM4_APP -DWOLFBOOT_BOOT_REMOTE_CORE
+    endif
     ifneq ($(PSOC6_CRYPTO),0)
         CFLAGS+=-DWOLFSSL_PSOC6_CRYPTO
         OBJS+=$(PSOC6_CRYPTO_OBJS)

config/examples/cypsoc6-qspi.config

@@ -0,0 +1,41 @@
+ARCH?=ARM
+TARGET?=psoc6
+PSOC6_BOARD?=CY8CKIT_062S2_43012
+SIGN?=ECC256
+HASH?=SHA256
+CYPRESS_PDL?=$(WOLFBOOT_ROOT)/lib/mtb-pdl-cat1
+CYPRESS_CMSIS?=$(WOLFBOOT_ROOT)/lib/cmsis
+CYPRESS_TEMPLATE_LIB?=$(WOLFBOOT_ROOT)/lib/mtb-template-cat1
+CYPRESS_CORE_LIB?=$(WOLFBOOT_ROOT)/lib/core-lib
+DEBUG?=0
+DEBUG_UART?=1
+VTOR?=1
+NO_MPU?=1
+FLAGS_INVERT?=1
+CORTEX_M0?=1
+NO_ASM?=0
+EXT_FLASH?=1
+NO_SWAP_EXT?=1
+FLAGS_HOME?=1
+SPI_FLASH?=0
+NO_XIP?=0
+UART_FLASH?=0
+ALLOW_DOWNGRADE?=0
+NVM_FLASH_WRITEONCE?=1
+WOLFBOOT_VERSION?=0
+V?=0
+SPMATH?=1
+RAM_CODE?=0
+DUALBANK_SWAP?=0
+PKA?=0
+WOLFTPM?=0
+PSOC6_CRYPTO?=0
+# Sectors match the 256 KB QSPI erase sector. wolfBoot 0x10000000 (256 KB),
+# BOOT 0x10040000 (1.5 MB) and SWAP 0x101C0000 (256 KB) in internal flash,
+# UPDATE 0x18000000 (1.5 MB) in QSPI. QSPI erases to 0xFF, so FLAGS_HOME
+# keeps every flag in the BOOT trailer.
+WOLFBOOT_PARTITION_SIZE?=0x180000
+WOLFBOOT_SECTOR_SIZE?=0x40000
+WOLFBOOT_PARTITION_BOOT_ADDRESS?=0x10040000
+WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x18000000
+WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x101C0000

config/examples/cypsoc6.config

@@ -1,20 +1,25 @@
 ARCH?=ARM
 TARGET?=psoc6
-SIGN?=ED25519
+PSOC6_BOARD?=CY8CKIT_062S2_43012
+SIGN?=ECC256
 HASH?=SHA256
-CYPRESS_PDL?=$(WOLFBOOT_ROOT)/lib/psoc6pdl
-CYPRESS_TARGET_LIB?=$(WOLFBOOT_ROOT)/lib/TARGET_CY8CKIT-062S2-43012
+CYPRESS_PDL?=$(WOLFBOOT_ROOT)/lib/mtb-pdl-cat1
+CYPRESS_CMSIS?=$(WOLFBOOT_ROOT)/lib/cmsis
+CYPRESS_TEMPLATE_LIB?=$(WOLFBOOT_ROOT)/lib/mtb-template-cat1
 CYPRESS_CORE_LIB?=$(WOLFBOOT_ROOT)/lib/core-lib
-DEBUG?=1
+DEBUG?=0
+DEBUG_UART?=1
 VTOR?=1
+NO_MPU?=1
+FLAGS_INVERT?=1
 CORTEX_M0?=1
 NO_ASM?=0
 EXT_FLASH?=0
 SPI_FLASH?=0
 NO_XIP?=0
 UART_FLASH?=0
 ALLOW_DOWNGRADE?=0
-NVM_FLASH_WRITEONCE?=0
+NVM_FLASH_WRITEONCE?=1
 WOLFBOOT_VERSION?=0
 V?=0
 SPMATH?=1
@@ -23,16 +28,10 @@ DUALBANK_SWAP?=0
 PKA?=0
 WOLFTPM?=0
 PSOC6_CRYPTO?=0
-WOLFBOOT_PARTITION_SIZE?=0x80000
-WOLFBOOT_SECTOR_SIZE?=512
-WOLFBOOT_PARTITION_BOOT_ADDRESS?=0x10080000
+# wolfBoot 0x10000000 (128 KB), BOOT 0x10020000 and UPDATE 0x10100000
+# (896 KB each), SWAP 0x101E0000 (one 4 KB subsector)
+WOLFBOOT_PARTITION_SIZE?=0xE0000
+WOLFBOOT_SECTOR_SIZE?=0x1000
+WOLFBOOT_PARTITION_BOOT_ADDRESS?=0x10020000
 WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x10100000
-WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x10010000
-
-# cypsoc6 places the swap sector (0x10010000) inside the bootloader
-# write-protect region [0x10000000, 0x10080000). This is a deliberate
-# peculiarity of this target: hal_flash_protect() is the weak no-op
-# (psoc6 does not override it), so the overlap is harmless at runtime.
-# Allow the overlap so the partition-geometry #error guards in
-# include/target.h.in do not fire for this config.
-WOLFBOOT_ALLOW_PART_OVERLAP = 1
+WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x101E0000