Add NXP S32G2 (S32G274A GoldBox) target: wolfBoot as the Boot ROM image, booting a signed FIT from SD, eMMC or QuadSPI NOR

Author: dgarske

.github/workflows/test-configs.yml

@@ -879,6 +879,38 @@ jobs:
       config-file: ./config/examples/imx8mm-pico.config
       make-args: IMX8MM_BL33=1 DISK_EMMC=0 IMX8MM_MMU=0 wolfboot.bin test-app/image_v1_signed.bin
 
+  s32g2_test:
+    uses: ./.github/workflows/test-build-aarch64.yml
+    with:
+      arch: aarch64
+      # Boot ROM image in SRAM, signed FIT from the SD card.
+      config-file: ./config/examples/s32g2-goldbox.config
+      make-args: wolfboot.bin
+
+  s32g2_emmc_test:
+    uses: ./.github/workflows/test-build-aarch64.yml
+    with:
+      arch: aarch64
+      # FIT from the eMMC behind the board's SW3, no console.
+      config-file: ./config/examples/s32g2-goldbox.config
+      make-args: DISK_EMMC=1 DISK_SDCARD=0 DEBUG_UART=0 wolfboot.bin
+
+  s32g2_qspi_test:
+    uses: ./.github/workflows/test-build-aarch64.yml
+    with:
+      arch: aarch64
+      # Boot from the QuadSPI NOR with the A/B partitions in the NOR.
+      config-file: ./config/examples/s32g2-goldbox-qspi.config
+      make-args: wolfboot.bin
+
+  s32g2_qspi_program_test:
+    uses: ./.github/workflows/test-build-aarch64.yml
+    with:
+      arch: aarch64
+      # NOR programmer build: image file from the SD card to the NOR.
+      config-file: ./config/examples/s32g2-goldbox.config
+      make-args: S32G2_QSPI=1 S32G2_QSPI_PROGRAM_FILE=/s32g2_qspi_boot.bin wolfboot.bin
+
   disk_boot_confirm_test:
     uses: ./.github/workflows/test-build-aarch64.yml
     with:

.gitignore

@@ -695,3 +695,8 @@ tools/unit-tests/stm32wb_write_extract.h
 tools/unit-tests/t10xx_flash_status_extract.h
 tools/unit-tests/ti_hercules_erase_extract.h
 tools/unit-tests/versal_host_write.c
+# S32G2 GoldBox FIT build outputs (tools/scripts/s32g2/s32g2-mkfit.sh)
+Image.gz
+s32g2-fitImage*
+s32g2.dtb
+s32g2_ddr.bin

Makefile

@@ -515,6 +515,11 @@ ifeq ($(TARGET),imx8mm)
     MAIN_TARGET:=wolfboot.bin test-app/image_v1_signed.bin
 endif
 
+# S32G2 runs from SRAM and boots a signed FIT; there is no factory.bin.
+ifeq ($(TARGET),s32g2)
+    MAIN_TARGET:=wolfboot.bin
+endif
+
 # i.MX95 M7 runs from ITCM (loaded by the Linux remoteproc driver); the payload
 # lives in DDR at 0x80100000, so there is no contiguous flash image to assemble.
 ifeq ($(TARGET),imx95_m7)
@@ -1101,6 +1106,16 @@ secondary: $(SECONDARY_PRIVATE_KEY)
 	@echo "\t[CC $(ARCH)] $@"
 	$(Q)$(CC) $(CFLAGS) -c $(OUTPUT_FLAG) $@ $^
 
+# The S32G2 HAL objects are rebuilt on every make: hal/s32g2_ddr.o links the
+# DDR blob in by content (its path and presence are build options), and the
+# NOR programmer file and offset in hal/s32g2.o are command-line options that
+# a stale object would silently keep.
+ifeq ($(TARGET),s32g2)
+hal/s32g2.o hal/s32g2_ddr.o: %.o: %.c FORCE
+	@echo "\t[CC $(ARCH)] $@"
+	$(Q)$(CC) $(CFLAGS) -c $(OUTPUT_FLAG) $@ $<
+endif
+
 %.o:%.S
 	@echo "\t[AS $(ARCH)] $@"
 	$(Q)$(CC) $(CFLAGS) -c $(OUTPUT_FLAG) $@ $^

arch.mk

@@ -363,6 +363,56 @@ ifeq ($(ARCH),AARCH64)
     endif
   endif
 
+  ifeq ($(TARGET),s32g2)
+    # NXP S32G274A GoldBox: wolfBoot is the Boot ROM's application image,
+    # copied into SRAM and entered at EL3. It runs its own identity MMU there
+    # and tears it down at the handoff with the stack-free flush routine.
+    ARCH_FLAGS=-mcpu=cortex-a53+crypto -march=armv8-a+crypto -mstrict-align
+    CFLAGS+=$(ARCH_FLAGS) -DCORTEX_A53
+    CFLAGS+=-DWOLFBOOT_AARCH64_MMU_TEARDOWN
+    WOLFBOOT_ORIGIN=0x340A0000
+    OBJS+=hal/s32g2_ddr.o
+    # wolfBoot adds /memory and the spin-table addresses to the FIT's DTB,
+    # which needs more room than the default headroom.
+    CFLAGS+=-DWOLFBOOT_FDT_FIXUP_HEADROOM=4096
+    # LPDDR4 register tables and PHY training firmware, generated by
+    # tools/scripts/s32g2/s32g2-ddr-blob.py. Without the file the image
+    # still builds, and reports the missing blob instead of training.
+    S32G2_DDR_BLOB ?= s32g2_ddr.bin
+    ifneq ($(wildcard $(S32G2_DDR_BLOB)),)
+      CFLAGS+=-DS32G2_DDR_BLOB='"$(abspath $(S32G2_DDR_BLOB))"'
+    endif
+    # uSDHC0 board facts. Here rather than in the config because a command-line
+    # CFLAGS_EXTRA= would replace the config's, whereas CFLAGS is additive.
+    ifneq ($(filter 1,$(DISK_SDCARD) $(DISK_EMMC)),)
+      # uSDHC -> SDHCI shim, shared with the i.MX 8 targets
+      OBJS+=hal/imx_usdhc_sdhci.o
+      # Card detect is a GPIO, so PRES_STATE bit 16 never sets.
+      CFLAGS+=-DSDHCI_FORCE_CARD_DETECT
+      # Read the payload in 64 KB chunks rather than the 512-byte default.
+      DISK_BLOCK_SIZE ?= 65536
+      CFLAGS+=-DDISK_BLOCK_SIZE=$(DISK_BLOCK_SIZE)
+      # 3.3 V signalling only (no-1-8-v): high-speed rates.
+      ifeq ($(DISK_EMMC),1)
+        S32G2_USDHC_MAX_CLK_KHZ ?= 52000
+      else
+        S32G2_USDHC_MAX_CLK_KHZ ?= 50000
+      endif
+      CFLAGS+=-DS32G2_USDHC_MAX_CLK_KHZ=$(S32G2_USDHC_MAX_CLK_KHZ)
+    endif
+    # QuadSPI NOR driver (the ext_flash API with EXT_FLASH=1)
+    ifeq ($(S32G2_QSPI),1)
+      CFLAGS+=-DS32G2_QSPI
+      # NOR programmer build: writes the named file from the SD/eMMC FAT
+      # partition to the NOR at S32G2_QSPI_PROGRAM_OFFSET, then halts.
+      ifneq ($(S32G2_QSPI_PROGRAM_FILE),)
+        S32G2_QSPI_PROGRAM_OFFSET ?= 0
+        CFLAGS+=-DS32G2_QSPI_PROGRAM_FILE='"$(S32G2_QSPI_PROGRAM_FILE)"'
+        CFLAGS+=-DS32G2_QSPI_PROGRAM_OFFSET=$(S32G2_QSPI_PROGRAM_OFFSET)
+      endif
+    endif
+  endif
+
   ifeq ($(TARGET),imx8mm)
     # uSDHC -> SDHCI shim, shared with imx8qm
     ifneq ($(filter 1,$(DISK_SDCARD) $(DISK_EMMC)),)

config/examples/s32g2-goldbox-qspi.config

@@ -0,0 +1,47 @@
+# NXP S32G2 GoldBox (S32G-VNP-GLDBOX, S32G274A-RDB2) - wolfBoot as the Boot
+# ROM's application image booting from the 64 MB QuadSPI NOR, with the A/B
+# image partitions in the same NOR and the signed FIT loaded into DDR. No SD
+# card is needed (DISK_SDCARD=0).
+#
+# NOR layout: wolfBoot at 0 (IVT, ROM QSPI parameters, code), BOOT partition
+# at 1 MB, UPDATE at 17 MB, SWAP sector at 33 MB.
+#   tools/scripts/s32g2/s32g2_mkimage.py wolfboot.bin s32g2_qspi_boot.bin --qspi
+# The NOR is written by a programmer build of the SD config
+# (S32G2_QSPI=1 S32G2_QSPI_PROGRAM_FILE=/<file>); the board must be strapped
+# for QuadSPI boot.
+# See docs/Targets.md.
+#
+# Never pass CFLAGS_EXTRA= on the command line - it replaces, not appends.
+ARCH=AARCH64
+TARGET=s32g2
+S32G2_QSPI=1
+SIGN?=ECC384
+HASH?=SHA384
+DEBUG?=1
+DEBUG_UART?=1
+SPMATH?=1
+NO_XIP?=1
+EXT_FLASH?=1
+# The HAL sets up the GICv3 itself (hal/s32g2.c); skip the generic GICv2 init.
+SKIP_GIC_INIT?=1
+GZIP?=1
+DISK_SDCARD?=0
+# The MX25UW51245G keeps an ECC code for every 16 bytes and each of those
+# units may be programmed once per erase, so the partition state cannot be
+# rewritten in place: keep it as a log of 16-byte records. The log takes the
+# last sector of each partition, and 64 KB sectors give it room for a 16 MB
+# partition (the driver erases them as 4 KB flash sectors).
+NVM_FLASH_JOURNAL?=1
+WOLFBOOT_SECTOR_SIZE?=0x10000
+WOLFBOOT_PARTITION_SIZE?=0x1000000
+WOLFBOOT_PARTITION_BOOT_ADDRESS?=0x100000
+WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x1100000
+WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x2100000
+# Separate DTB partitions are not used (the FIT carries the DTB) but the
+# RAM-boot flow needs them defined; they sit after the swap sector.
+WOLFBOOT_DTS_BOOT_ADDRESS?=0x2110000
+WOLFBOOT_DTS_UPDATE_ADDRESS?=0x2120000
+
+WOLFBOOT_RAMBOOT_MAX_SIZE=0x4000000
+WOLFBOOT_LOAD_ADDRESS?=0xA0000000
+WOLFBOOT_LOAD_DTS_ADDRESS?=0xA5000000

config/examples/s32g2-goldbox.config

@@ -0,0 +1,45 @@
+# NXP S32G2 GoldBox (S32G-VNP-GLDBOX, S32G274A-RDB2) - wolfBoot as the Boot
+# ROM's application image: copied into SRAM at 0x340A0000 and entered at EL3
+# with only FIRC running, in place of U-Boot. The signed FIT (kernel + DTB,
+# hal/s32g2.its) is read from a FAT32 partition of the SD card, or of the
+# eMMC with DISK_EMMC=1 DISK_SDCARD=0.
+#
+# The LPDDR4 tables and PHY firmware come from the NXP BSP U-Boot sources:
+#   tools/scripts/s32g2/s32g2-ddr-blob.py <nxp-u-boot> s32g2_ddr.bin
+# Wrap wolfboot.bin for the Boot ROM and write it at SD byte offset 0x1000:
+#   tools/scripts/s32g2/s32g2_mkimage.py wolfboot.bin s32g2_boot.bin
+#   dd if=s32g2_boot.bin of=/dev/sdX bs=512 seek=8
+# See docs/Targets.md.
+#
+# Never pass CFLAGS_EXTRA= on the command line - it replaces, not appends.
+ARCH=AARCH64
+TARGET=s32g2
+SIGN?=ECC384
+HASH?=SHA384
+DEBUG?=1
+DEBUG_UART?=1
+SPMATH?=1
+NO_XIP?=1
+# The HAL sets up the GICv3 itself (hal/s32g2.c); skip the generic GICv2 init.
+SKIP_GIC_INIT?=1
+WOLFBOOT_SECTOR_SIZE?=0x1000
+WOLFBOOT_NO_PARTITIONS=1
+GZIP?=1
+DISK_SDCARD?=1
+DISK_FS?=fat32
+
+# A/B slots: two files on the third partition (FAT32). The higher version
+# boots. An older version is not used when the newer one fails to verify
+# (anti-rollback), unless built with ALLOW_DOWNGRADE=1.
+# A slot staged by an update is booted once on probation and skipped on the
+# next boot unless the OS confirmed it (docs/compile.md, "Disk boot
+# confirmation"). The state is the last 8 bytes of the slot's file.
+DISK_BOOT_CONFIRM?=1
+CFLAGS_EXTRA+=-DBOOT_PART_A=2
+CFLAGS_EXTRA+=-DBOOT_PART_B=2
+CFLAGS_EXTRA+=-DBOOT_FILE_A='"/fitImage_a.bin"'
+CFLAGS_EXTRA+=-DBOOT_FILE_B='"/fitImage_b.bin"'
+
+WOLFBOOT_RAMBOOT_MAX_SIZE=0x4000000
+WOLFBOOT_LOAD_ADDRESS?=0xA0000000
+WOLFBOOT_LOAD_DTS_ADDRESS?=0xA5000000