Update the STM32L5 secure app docs for the NSC, clock and GTZC changes

Author: aidangarske

docs/Targets.md

@@ -299,15 +299,16 @@ All partitions are at the Secure flash alias:
 
 | Region | Address | Size |
 | --- | --- | --- |
-| wolfBoot (with an empty NSC) | `0x0C000000` | 48 KB |
+| wolfBoot | `0x0C000000` | 48 KB |
 | Boot partition (secure application) | `0x0C00C000` | 128 KB |
 | Secure application NVM (not touched by wolfBoot) | `0x0C038000` | 24 KB |
 | Swap page | `0x0C03E000` | 2 KB |
 | Update partition (start of bank 2) | `0x0C040000` | 128 KB |
 | Non-secure guests | `0x08060000` | 128 KB |
 
-wolfBoot keeps SRAM1 and SRAM2 Secure across the jump, opens no Non-secure
-flash, RAM or peripheral window in the SAU, and
+wolfBoot keeps SRAM1 and SRAM2 Secure across the jump (the GTZC reset value),
+enables no SAU region and builds no Non-secure callable entries, keeps the
+110 MHz PLL clock running (`WOLFBOOT_RESTORE_CLOCK=0`), and
 links its own RAM at `0x30030000` so that `0x30000000-0x3002FFFF` (the record
 and the secure application's RAM) is left untouched. The PSA lifecycle in the
 record comes from the RDP level in `FLASH_OPTR` (`hal/stm32l5_lifecycle.h`).

docs/secure_app_handoff.md

@@ -102,15 +102,16 @@ boot, update and rollback on the m33mu MCXN947 model.
 and the partitions at the Secure flash alias (`0x0C00C000` boot, `0x0C040000`
 update, both 128 KB). wolfBoot links its RAM at `0x30030000`
 (`hal/stm32l5-secure-app.ld`) to stay clear of the record and the secure app's
-RAM. `hal/stm32_tz.c` keeps SRAM1 and SRAM2 Secure and opens no Non-secure
-flash, RAM or peripheral window in the SAU (only the NSC region),
-`hal/stm32l5.c` skips the GTZC peripheral unsecuring and keeps the 110 MHz
-PLL clock running, and
+RAM. SRAM1 and SRAM2 stay Secure at their GTZC reset value, the SAU has no
+region enabled, and without `WOLFCRYPT_TZ` wolfBoot links no `wolfBoot_nsc_*`
+entries, so Non-secure code has no path into the update partition.
+`hal/stm32l5.c` skips the GTZC peripheral unsecuring, the config sets
+`WOLFBOOT_RESTORE_CLOCK=0` so the 110 MHz PLL keeps running, and
 `hal_attestation_get_lifecycle()` maps the RDP level to a PSA lifecycle
 (`hal/stm32l5_lifecycle.h`; it reports unknown when TZEN is off). The
 `trustzone-emulator-tests` workflow runs boot, update and rollback on the m33mu
-STM32L552 model and checks on every boot the record and that no
-Non-secure SAU window is open.
+STM32L552 model and checks on every boot the record and that no SAU region
+is enabled.
 
 ## Tests